Interview Question on digital electronics

Your task is to predict the maximum performance that you can achieve if you implement the following pseudocode in hardware with a single-port memory array in Question a and with a dual-port memory array in Question b.

for i := 0 to 254
{
if A[i] > A[i+1] then
{
tmp := A[i+1];
A[i+1] := A[i];
A[i] := tmp;
}
}

Question a: If you use a single-port memory array, what is the minimum number of clock cycles that your circuit will need to perform the above loop?

Question b: If you use a dual-port memory with one read port and one read/write port, what is the minimum number of clock cycles that your circuit will need to perform the above loop?