Texas Instruments, Bangalore - Interview Questions - Freshers

For the following question, you only need to give the relevant VHDL code fragment (i.e. process that drives the flop). You may assume that any signals you need or want to use are defined appropriately. Use obvious labels like d, q, cs select, reset, etc.

1. Give a VHDL code fragment to implement a standard D flip-flop.
2. Give a VHDL code fragment to implement a flip-flop with a multiplexer on its input (assume two inputs: a and b).
3. Give a VHDL code fragment to implement a flip-flop with a chip select line and an asynchronous reset.

Sol 1:

process(clk)
begin
if rising_edge(clk) then
q <= d;
end if;
end process;

Sol 2:

process(clk)
begin
if rising_edge(clk) then
if (sel = '1')
q <= a;
else
q <= b;
end if;
end if;
end process;

Sol 3:

process(clk, reset)
begin
if (reset = '1') then
q <= '0';
elsif rising_edge(clk) then
if (cs_select = '1') then
q <= d;
end if;
end if;
end process;

Difficulty: Easy