Todays Low Power Techniques

Lets take a look at the various low power techniques in use today.
I would classify them into 2 categories

• Structural Techniques
• Voltage Islands
• Multi-threshold devices
• Multi-oxide devices
• Minimize capacitance by custom design
• Power efficient circuits
• Parallelism in micro-architecture

• Traditional Techniques
• Clock gating
• Power gating
• Variable frequency
• Variable voltage supply
• Variable device threshold

Which one of the above techniques are aimed at reducing Dynamic Power and Leakage Power?

Dynamic Power Reduction

• Clock Gating
• Power efficient circuits
• Variable frequency
• Variable voltage supply

Leakage Power Reduction

• Minimize usage of Low Vt Cells
• Power Gating
• Back Biasing
• Reducing Dynamic Power
• Reduce Oxide Thickness
• Use FINFET's